Computer Performance Microscopy with S HIM Xi Yang‡ Stephen M. Blackburn‡ National University

Source URL: users.cecs.anu.edu.au

• Digital signal processing
• Central processing unit
• Microprocessors
• Parallel computing
• Signal processing
• Profiling
• Sampling
• Instructions per cycle
• Audio bit depth
• Multi-core processor
• Multithreading

Microsoft PowerPoint - cs677s15_9.pptx

Source URL: www.cs.stevens.edu

• Concurrent computing
• Computing
• Parallel computing
• GPGPU
• Computer architecture
• Graphics hardware
• Application programming interfaces
• Cross-platform software
• OpenCL
• CUDA
• Graphics processing unit
• Nvidia

Using Restricted Transactional Memory to Build a Scalable In-Memory Database Zhaoguo Wang†, Hao Qian‡, Jinyang Li§, Haibo Chen‡ † School of Computer Science, Fudan University ‡ Institute of Parallel and Distri

Source URL: ipads.se.sjtu.edu.cn

• Transaction processing
• Concurrency control
• Data management
• Databases
• Software transactional memory
• Database transaction
• Serializability
• Extensible Storage Engine
• Linearizability
• Transactional memory
• Optimistic concurrency control
• Atomicity

2011 IEEE International Parallel & Distributed Processing Symposium Evaluating Adaptive Compression to Mitigate the Effects of Shared I/O in Clouds Matthias Hovestadt, Odej Kao, Andreas Kliem and Daniel Warneke Technisc

Source URL: stratosphere.eu

• Software
• Computing
• System software
• Cloud infrastructure
• Cloud computing
• Virtualization
• Xen
• Hyper-V
• Virtual machine
• I/O virtualization
• Hypervisor
• Kernel-based Virtual Machine

Performance Evaluation of Adaptivity in Software Transactional Memory Mathias Payer ETH Zurich, Switzerland Abstract—Transactional memory (TM) is an attractive platform for parallel programs,

Source URL: hexhive.github.io

• Concurrency control
• Computing
• Transaction processing
• Data management
• Information science
• Software transactional memory
• Lock
• Non-blocking algorithm
• Transactional memory
• Linearizability
• Critical section
• Synchronization

Cache Refill/Access Decoupling for Vector Machines Christopher Batten, Ronny Krashinsky, Steve Gerding, Krste Asanović Computer Science and Artificial Intelligence Laboratory Massachusetts Institute of Technology

Source URL: www.lcs.mit.edu

• Computing
• Parallel computing
• Computer architecture
• Central processing unit
• Computer hardware
• Data parallelism
• Cache control instruction

Corey: An Operating System for Many Cores Silas Boyd-Wickizer∗ Haibo Chen† Rong Chen† Yandong Mao† Frans Kaashoek∗ Robert Morris∗ Aleksey Pesterev∗ Lex Stein‡ Ming Wu‡ Yuehua Dai◦ Yang Zhang∗ Zheng

Source URL: ipads.se.sjtu.edu.cn

• Computing
• Computer architecture
• Computer engineering
• Parallel computing
• Concurrent computing
• Manycore processors
• Central processing unit
• Multi-core processor
• Kernel
• Thread
• CPU cache
• Linux kernel

Why Software Hangs and What Can Be Done With It ∗ Xiang Song, Haibo Chen and Binyu Zang Parallel Processing Institute, Fudan University {xiangsong, hbchen, byzang}@fudan.edu.cn

Source URL: ipads.se.sjtu.edu.cn

• Computing
• Software engineering
• Computer programming
• Software bugs
• Computer errors
• Software testing
• Software
• Infinite loop
• Debugging
• Crash
• Bug tracking system
• Hang

Fast In-memory Transaction Processing using RDMA and HTM Xingda Wei, Jiaxin Shi, Yanzhe Chen, Rong Chen, Haibo Chen Shanghai Key Laboratory of Scalable Computing and Systems Institute of Parallel and Distributed Systems,

Source URL: sigops.org

Ninth IEEE International Symposium on Parallel and Distributed Processing with Applications Workshops Trusted Computing Dynamic Attestation by Using Static Analysis based Behavior Model Tang‡ , Yue Yu∗ , Tong Li∗

Source URL: yuyue.github.io